منابع مشابه
OS Support for Virtualizing Hardware Transactional Memory
Transactional memory promises to simplify multithreaded programming. Hardware TM (HTM) implementations promise better performance by augmenting processors with transactional state. However, HTMs interact poorly with the operating system or virtual machine monitor. For example, they often do not tolerate OS actions that virtualize processors and memory, such as context switching and paging. With...
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Current trends in DRAM memory chip fabrication have led many researchers to propose \intelligent memory" architectures that integrate microprocessors or logic with memory. Such architectures o er a potential solution to the growing communication bottleneck between conventional microprocessors and memory. Previous studies, however, have focused upon single-chip systems and have largely neglected...
متن کاملTransactional Memory
Shared memory parallel architectures present a single unified address space to each processor. Usually the memory is physically distributed across the system but each processor is able to access any part of it through a single address space. The system hardware is responsible for presenting this abstraction to each processor. Communication between processors is done implicitly through normal me...
متن کاملTransactional Memory
Today's methods of writing programs that are executed on shared-memory multiprocessors systems rely mostly on locking mechanism. On one hand, those methods enable programmers to write correct multi-threaded programs that access shared resources; on the other hand, lock usage reduces performance due to suboptimal use of them. In this survey paper we will show several implementations of Transacti...
متن کاملHardware-Supported Transactional Memory
In this report, we describe a number of Hardware Transactional Memory (HTM) designs and their basic mechanisms used for better programmability and higher performance than conventional synchronization techniques based on locking. We compare the systems considering their programming model, hardware design challenges, transactional dataset constraints and forward progress guarantees. As high-speed...
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ژورنال
عنوان ژورنال: ACM SIGARCH Computer Architecture News
سال: 2005
ISSN: 0163-5964
DOI: 10.1145/1080695.1070011